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  • KLayout integration
    E mail POLYTEDA LLC provides verification software that combines accuracy and scalability Our unique technology makes PowerDRC LVS from POLYTEDA the best solution for medium and large IC layouts and modern IC process nodes A large number of developers as well as our customers use KLayout editor so POLYTEDA integrated PowerRDE with KLayout PowerRDE integration with KLayout viewer and editor is available since PowerDRC LVS release 1 7 and enables the user to Invoke PowerDRC LVS from KLayout Review results and highlight errors in KLayout Find and highlight shorted nets using POLYTEDA Short Finder utility T he integration requires that the source code of K Layout should be changed to allow for running PowerDRC LVS and for debugging of highlighted violations To use this feature you need to download KLayout 0 23 11 specifically modified by POLYTEDA You can download the binary and source code of the modified version of KLayout free as required by GPL from this page To get more information about KLayout and download most recent version please visit www klayout de Download and build Download KLayout 0 23 11 binary for Linux 64 bit POLYTEDA edition Download KLayout 0 23 11 binary for Windows 32 bit

    Original URL path: http://www.polyteda.com/products/klayout-integration.html (2016-04-26)
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  • Technology
    linear performance gain on a single host LSF SGE NEFELUS cloud PowerDRC LVS is available on NEFELUS Cloud Platform as pay per use service Un compromising accuracy for all checks simple and complex Silicon proven 250nm 180nm 130nm 90nm 65nm 40nm PDF Print E mail Introduction to One Shot DRC Fine Grain Physical Verification TM Technology Platform As process technologies advance to smaller sub wavelength geometries such as 28nm and beyond several new physical verification challenges have emerged Examples of the challenges are the use and the number of dummy fills grow exponentially proximity effects are required to be dealt with universally and have a strong impact on yield the number of rules and related parameters grow exponentially rules are very complex and often conflicting making coding a monumental task and often leading to over checking and under checking Today runtimes and accuracy problems in the form of under and over checking are major concerns even with the use of hierarchical DRC tools based on multi CPU configuration One Shot DRC is POLYTEDA s innovation It is neither flat nor hierarchical It is done in one shot A layout is partitioned into smaller blocks and DRC is performed on all

    Original URL path: http://www.polyteda.com/technology.html (2016-04-26)
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  • One-Shot-DRC-and-fgPV
    for linear performance gain on a single host LSF SGE NEFELUS cloud Silicon proven 250nm 180nm 130nm 90nm 65nm 40nm Scalability proven on 2 4 6 8 12 16 24 32 CPUs High performance delivering maximum CPU efficiency per rule check PDF Print E mail Introduction to One Shot DRC Fine Grain Physical Verification TM Technology Platform As process technologies advance to smaller sub wavelength geometries such as 28nm and beyond several new physical verification challenges have emerged Examples of the challenges are the use and the number of dummy fills grow exponentially proximity effects are required to be dealt with universally and have a strong impact on yield the number of rules and related parameters grow exponentially rules are very complex and often conflicting making coding a monumental task and often leading to over checking and under checking Today runtimes and accuracy problems in the form of under and over checking are major concerns even with the use of hierarchical DRC tools based on multi CPU configuration One Shot DRC is POLYTEDA s innovation It is neither flat nor hierarchical It is done in one shot A layout is partitioned into smaller blocks and DRC is performed on all

    Original URL path: http://www.polyteda.com/technology/fine-grain-pv.html (2016-04-26)
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  • XOR and QuickDiff
    released Follow Us XOR and QuickDiff PDF Print E mail XOR is a regular diffing function for two layouts It involves profound comparison of corresponding layers in pairs according to rule file either generated automatically or specifically written In PowerDRC LVS XOR operation leverages multi CPU and multi core technologies for the best efficiency It becomes truly impressive when XOR is combined with QuickDiff with manifold eventual speedup QuickDiff is

    Original URL path: http://www.polyteda.com/technology/xor-and-quickdiff.html (2016-04-26)
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  • Fill layers generation
    teaching license to University of Roma Tor Vergata PowerDRC LVS 2 0 released Follow Us Fill layers generation PDF Print E mail Running PowerDRC on a special fill rule deck results in generating of output gds file with fill layers The developer may attach these layers later as a separate group to some cell top cell hierarchically using a layout editor Fill operation creates layers filled with specified rectangles at

    Original URL path: http://www.polyteda.com/technology/fill-layers-generation.html (2016-04-26)
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  • News
    a teaching license to University of Roma Tor Vergata PowerDRC LVS 2 0 released Follow Us Scalability proven on 2 4 6 8 12 16 24 32 CPUs Silicon proven 250nm 180nm 130nm 90nm 65nm 40nm Multi CPU operations for linear performance gain on a single host LSF SGE NEFELUS cloud High performance delivering maximum CPU efficiency per rule check Un compromising accuracy for all checks simple and complex PowerDRC

    Original URL path: http://www.polyteda.com/news-a-events.html (2016-04-26)
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  • Press Releases
    of PowerDRC LVS version 2 2 Read more PowerDRC LVS 2 1 released Kiev Ukraine May 21 2015 POLYTEDA Software Corp a provider of semiconductor design software and PV services today announced the general availability of PowerDRC LVS version 2 1 Read more PowerDRC LVS 2 0 1 released Kiev Ukraine November 14 2014 POLYTEDA Software Corp a provider of semiconductor design software and PV services today announced the general availability of PowerDRC LVS version 2 0 1 Read more PowerDRC LVS 2 0 released Kiev Ukraine July 29 2014 POLYTEDA Software Corp a provider of semiconductor design software and PV services today announced the general availability of PowerDRC LVS version 2 0 Read more PowerDRC LVS 1 7 1 released Kiev Ukraine March 19 2014 POLYTEDA Software Corp a provider of semiconductor design software today announced the general availability of PowerDRC LVS version 1 7 1 Read more PowerDRC LVS 1 7 released Santa Clara USA July 24 2013 POLYTEDA Software Corp a provider of semiconductor design software today announced the general availability of PowerDRC LVS version 1 7 Read more POLYTEDA to Expand Global Activities Through New Joint Alliance with TekStart Leading sales marketing and support partner to assist in expansion of POLYTEDA s global presence focusing on semiconductor foundries and fabless SoC developers looking for faster and more accurate verification solutions Read more PowerDRC MOSIS SCMOS DRC rule deck set ver 1 0 released Santa Clara USA April 17 2013 POLYTEDA Software Corporation released scalable DRC rule deck set ver 1 0 fully compatible with MOSIS Scalable CMOS SCMOS rev 8 0 Read more PowerDRC LVS version 1 6 2 released Santa Clara USA November 27 2012 POLYTEDA Software Corp a provider of semiconductor design software today announced the general availability of PowerDRC LVS version 1 6

    Original URL path: http://www.polyteda.com/news-a-events/press-releases.html (2016-04-26)
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  • Company News
    POLYTEDA Software Corp donated a teaching license for 6 seats of their PowerDRC LVS flagship product to Macquarie University Australia to be used with Analog Office from AWR Corp This software will be used by the PhD students for RFIC research using IHP and Silanna as the foundries DRC Tool Guns for Calibre at DAC Friday 17 June 2011 00 00 DRC tool guns for Calibre at DAC Read more Manufacturability Coalition Gains Friday 06 May 2011 00 00 Manufacturability Coalition Gains POLYTEDA Read more Polyteda Joins Si2 Wednesday 27 April 2011 00 00 POLYTEDA Joins Si2 s Design for Manufacturability Coalition Read more A New Cut at DRC Monday 04 April 2011 00 00 A New Cut at DRC Polyteda Resets Run Times Read more Vlad Marchuk s EE Times Viewpoint Thursday 10 March 2011 18 19 From EE Times Major changes expected for physical verification tools as designs move into 28nm and below Vlad Marchuk CTO Co Founder POLYTEDA Software Corp Read more POLYTEDA Makes EETimes Silicon 60 List Friday 03 December 2010 00 00 POLYTEDA Makes EE Times Silicon 60 List of Emerging Startups One of Only Two EDA Companies to Make the List Toronto Canada November 30 2010 POLYTEDA Software Corporation a provider of advanced physical verification solutions today announced its partnership with DaouXilicon Corp a company with a strong track record of selling and offering technical support for EDA products in South Korea DaouXilicon Inc www daouxilicon com is a specialist in distributing EDA products and provides total solutions for semiconductor design It was established in 1997 The company supports the electronic industry and EDA Electronics Design Automation companies with service support and technology options and an experienced team This expands the horizon for POLYTEDA into Korea a major force in not only electronic product

    Original URL path: http://www.polyteda.com/news-a-events/news.html (2016-04-26)
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